Espressif Systems has issued a bug advisory for ESP32-C5 chips addressing three bugs concerning PSRAM and sleep coexistence stability.
New microcontrollers commonly encounter initial issues, prompting companies to release errata detailing bugs and fixes, similar to what we’ve noted with the Raspberry Pi RP2350 A4 stepping, which corrected the E9 GPIO Erratum with an updated silicon version.
Espressif identified three issues with the ESP32-C5:
- PSRAM Reset Hang – Running ESP-IDF v5.5.1 on ESP32-C5 chips with PSRAM enabled might cause a CPU or digital reset hang, leading to a secondary RTC WDT reset. If the rollback feature (CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE, disabled by default) is active, it could lead to an OTA rollback.
- AES and SHA Access to PSRAM – Using ESP-IDF v5.5.1, PSRAM data may become corrupted when AES or SHA hardware access unaligned buffers to a 16-byte boundary.
- Sleep Coexistence Stability – While running ESP-IDF v5.5.1 with ESP_WIFI_ENHANCED_LIGHT_SLEEP enabled, task watchdog timeouts can occur during Wi-Fi/BLE/IEEE 802.15.4 dual-mode or tri-mode operation, potentially preventing system recovery after a CPU reset.
Fortunately, all identified issues already have resolutions or workarounds within the ESP-IDF framework, negating the need for a new silicon version.
If your firmware utilizes ESP-IDF v5.5.1, v6.0-beta1, or the master branch, upgrading to v5.5.2, v6.0 release, or v6.1 once available is necessary, or alternatively upgrade to the patched ESP-IDF version specified in the tables in the AR2025-008 advisory.
